Hi all, I'm trying to get spidev up on spi5 on the imx6 (not the arduino), I've been following the instructions in the user manual and at https://community.freescale.com/thread/302612 which details how to do it for a similair board. I've uncommented all the SPI5 pins in board-mx6qd_seco_UDOO.h, and commented out the corresponding standard GPIO pins, I've also removed those pins from the input array in board-mx6qd_seco_UDOO.h. I've quoted my full kernel diff to show exactly what changes I've made below. At boot I'm seeing the following, and not much more information: Code: [ 0.892438] spi_imx imx6q-ecspi.4: can't get cs gpios [ 0.897516] spi_imx: probe of imx6q-ecspi.4 failed with error -22 I've tried varios CS gpio pins, including only using SS0, with no luck. It seems the spi_imx driver can't claim the pins, and yet as far as I can see they aren't being used by anything else. Any help would be appreciated! Has anyone got SPI working? Code: diff --git a/arch/arm/mach-mx6/board-mx6_seco_UDOO.c b/arch/arm/mach-mx6/board-mx6_seco_UDOO.c index 78f9fc7..b7fc9ec 100644 --- a/arch/arm/mach-mx6/board-mx6_seco_UDOO.c +++ b/arch/arm/mach-mx6/board-mx6_seco_UDOO.c @@ -915,6 +915,36 @@ void set_gpios_directions(void) printk("#### No gpios to export"); } +/*********************************************************************** + * SPI * + ***********************************************************************/ + +static int mx6q_seco_udoo_spi_cs5[] = { + MX6Q_PAD_SD1_DAT1__ECSPI5_SS0, + MX6Q_PAD_SD1_DAT2__ECSPI5_SS1, + MX6Q_PAD_SD1_DAT3__ECSPI5_SS2, + MX6Q_PAD_SD2_DAT3__ECSPI5_SS3 +}; + +static const struct spi_imx_master mx6q_seco_UDOO_spi_data5 __initconst = { + .chipselect = mx6q_seco_udoo_spi_cs5, + .num_chipselect = ARRAY_SIZE(mx6q_seco_udoo_spi_cs5), +}; + +static struct spi_board_info imx6_seco_UDOO_spi_device[] __initdata = { + { + .modalias = "spidev", + .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */ + .bus_num = 4, + .chip_select = 0, + .mode = SPI_MODE_0, + }, +}; + +static void spi_device_init(void) { + spi_register_board_info(imx6_seco_UDOO_spi_device, + ARRAY_SIZE(imx6_seco_UDOO_spi_device)); +} /*********************************************************************** @@ -1035,6 +1065,9 @@ static void __init mx6_seco_UDOO_board_init(void) ARRAY_SIZE(mxc_i2c2_board_info)); + imx6q_add_ecspi(4, &mx6q_seco_UDOO_spi_data5); + spi_device_init(); + imx6q_add_mxc_hdmi(&hdmi_data); imx6q_add_anatop_thermal_imx(1, &mx6q_seco_UDOO_anatop_thermal_data); diff --git a/arch/arm/mach-mx6/board-mx6qd_seco_UDOO.h b/arch/arm/mach-mx6/board-mx6qd_seco_UDOO.h index bfd2c4b..f1d16cf 100644 --- a/arch/arm/mach-mx6/board-mx6qd_seco_UDOO.h +++ b/arch/arm/mach-mx6/board-mx6qd_seco_UDOO.h @@ -249,35 +249,35 @@ static iomux_v3_cfg_t mx6qd_seco_UDOO_pads[] = { //MX6DL_PAD_CSI0_DAT11__UART1_RXD, MX6Q_PAD_CSI0_DAT10__GPIO_5_28, // pin 1 //MX6Q_PAD_CSI0_DAT10__UART1_TXD, - MX6Q_PAD_SD1_CLK__GPIO_1_20, // pin 2 + //MX6Q_PAD_SD1_CLK__GPIO_1_20, // pin 2 // MX6Q_PAD_SD1_CLK__USDHC1_CLK, - // MX6Q_PAD_SD1_DAT1__ECSPI5_SCLK, - MX6Q_PAD_SD1_DAT0__GPIO_1_16, // pin 3 + MX6Q_PAD_SD1_CLK__ECSPI5_SCLK, + //MX6Q_PAD_SD1_DAT0__GPIO_1_16, // pin 3 // MX6Q_PAD_SD1_DAT0__USDHC1_DAT0, - // MX6Q_PAD_SD1_DAT1__ECSPI5_MISO, - MX6Q_PAD_SD1_DAT1__GPIO_1_17, // pin 4 + MX6Q_PAD_SD1_DAT0__ECSPI5_MISO, + //MX6Q_PAD_SD1_DAT1__GPIO_1_17, // pin 4 // MX6Q_PAD_SD1_DAT1__USDHC1_DAT1, // MX6Q_PAD_SD1_DAT1__PWM3_PWMO, - // MX6Q_PAD_SD1_DAT1__ECSPI5_SS0, + MX6Q_PAD_SD1_DAT1__ECSPI5_SS0, // MX6Q_PAD_SD1_DAT1__GPT_CAPIN2, - MX6Q_PAD_SD1_CMD__GPIO_1_18, // pin 5 + //MX6Q_PAD_SD1_CMD__GPIO_1_18, // pin 5 // MX6Q_PAD_SD1_CMD__USDHC1_CMD, // MX6Q_PAD_SD1_CMD__PWM4_PWMO, - // MX6Q_PAD_SD1_CMD__ECSPI5_MOSI, + MX6Q_PAD_SD1_CMD__ECSPI5_MOSI, MX6Q_PAD_SD4_DAT1__GPIO_2_9, // pin 6 // MX6Q_PAD_SD4_DAT1__PWM3_PWMO, MX6Q_PAD_SD4_DAT2__GPIO_2_10, // pin 7 // MX6Q_PAD_SD4_DAT2__PWM4_PWMO, - MX6Q_PAD_SD1_DAT3__GPIO_1_21, // pin 8 + //MX6Q_PAD_SD1_DAT3__GPIO_1_21, // pin 8 // MX6Q_PAD_SD1_DAT3__PWM1_PWMO, // MX6Q_PAD_SD1_DAT3__USDHC1_DAT3, - // MX6Q_PAD_SD1_DAT3__ECSPI5_SS2, + MX6Q_PAD_SD1_DAT3__ECSPI5_SS2, // MX6Q_PAD_SD1_DAT3__WDOG2_WDOG_RST_B_DEB, - MX6Q_PAD_SD1_DAT2__GPIO_1_19, // pin 9 + // MX6Q_PAD_SD1_DAT2__GPIO_1_19, // pin 9 // MX6Q_PAD_SD1_DAT2__PWM2_PWMO, // MX6Q_PAD_SD1_DAT2__USDHC1_DAT2, - // MX6Q_PAD_SD1_DAT2__ECSPI5_SS1, + MX6Q_PAD_SD1_DAT2__ECSPI5_SS1, // MX6Q_PAD_SD1_DAT2__GPT_CMPOUT2, MX6Q_PAD_GPIO_1__GPIO_1_1, // pin 10 // MX6Q_PAD_GPIO_1__PWM2_PWMO, @@ -404,16 +404,16 @@ static unsigned int mx6q_set_in_inputmode[] = { MX6Q_PAD_CSI0_DAT10__GPIO_MODE, MX6Q_PAD_CSI0_DAT11__GPIO_MODE, - MX6Q_PAD_SD1_CLK__GPIO_MODE, - MX6Q_PAD_SD1_DAT0__GPIO_MODE, + //MX6Q_PAD_SD1_CLK__GPIO_MODE, + //MX6Q_PAD_SD1_DAT0__GPIO_MODE, - MX6Q_PAD_SD1_DAT1__GPIO_MODE, - MX6Q_PAD_SD1_CMD__GPIO_MODE, + //MX6Q_PAD_SD1_DAT1__GPIO_MODE, + //MX6Q_PAD_SD1_CMD__GPIO_MODE, MX6Q_PAD_SD4_DAT1__GPIO_MODE, MX6Q_PAD_SD4_DAT2__GPIO_MODE, - MX6Q_PAD_SD1_DAT3__GPIO_MODE, + //MX6Q_PAD_SD1_DAT3__GPIO_MODE, - MX6Q_PAD_SD1_DAT2__GPIO_MODE, + //MX6Q_PAD_SD1_DAT2__GPIO_MODE, MX6Q_PAD_GPIO_1__GPIO_MODE, MX6Q_PAD_GPIO_9__GPIO_MODE, MX6Q_PAD_GPIO_3__GPIO_MODE,
I'm running into the same problem (although i'm trying to use spi1) and wondered if you were able to fix this? I also noticed the error in dmesg is gone when moving these lines Code: imx6q_add_ecspi(4, &mx6q_seco_UDOO_spi_data5); spi_device_init(); to the bottom of mx6_seco_UDOO_board_init() . The error is gone but there is no other mention of spi in dmesg log, and there is no /dev/spi* file created. i do get something in /proc/iomem , but i'm not sure what this means.. Code: # less /proc/iomem | grep spi 02018000-02018fff : imx6q-ecspi.4 Thanks for any hints!
Hello, I have searched in the Datasheet, i found this: EIM_D16 ECSPI1_SCKL EIM_D17 ECSPI1_MISO EIM_D18 ECSPI1_MOSI EIM_D24 ECSPI1_SS2, ECSPI1_SS3... Now, in the Kernel config Header Source: MX6Q_PAD_EIM_D16__ECSPI1_SCLK, // - to SPI MX6Q_PAD_EIM_D17__ECSPI1_MISO, // - to SPI MX6Q_PAD_EIM_D18__ECSPI1_MOSI, // - to SPI MX6Q_PAD_EIM_D19__GPIO_3_19, /*SS1*/ // - to SPI CS1 (In Datasheet is D24?!) The Schematic for REV D Says, D19 is going to the Watchdog... That is very tricky.... Informations Outdated?
